1. Technical Field
The present invention relates to a semiconductor storage device and a method of manufacturing the same.
2. Related Art
A sense amp included in a semiconductor storage device is a circuit that quickly detects a minute fluctuation in status of each memory cell (such as fluctuation in current and potential) in a form of a large potential amplitude. Characteristics required from the sense amp include high speed, a wide range of voltage and temperature, and a sufficient margin for process fluctuation and power source noise. Now that the ultra high level of integration progresses, the range of voltage and temperature, as well as the margin for process fluctuation are being forced to be reduced, and hence such characteristics have to be improved.
The semiconductor storage devices so far developed include the one disclosed in Japanese patent publication No. 3578661. The semiconductor storage device according to this document is a non-volatile semiconductor storage device such as a mask ROM, which retains data stored in the memory cell despite turning off. This device includes, as shown in FIG. 4, a memory cell 1111, selection cells 11211, 11221, a word line 113, column lines 1141, 1142, a word line drive circuit 115, column selection circuits 1161, 1162, a read-out driver 1191, a buffer 1201, a reference unit 122, and a sense amp 1231.
The memory cell 1111 is constituted of MOS transistors, the gates of which are mutually connected via the word line 113, and are connected to an output terminal of the word line drive circuit 115 via the word line 113.
The selection cell 11211 is constituted of MOS transistors, the gates of which are mutually connected via the column line 1141, and are connected to an output terminal of the column selection circuit 1161 via the column line 1141. The column selection circuit 1161 decodes an address provided from outside at a first stage decoding and applies, when the column line 1141 is thereby selected, a high level (hereinafter, H-level) signal to the column line 1141. Accordingly, the H-level signal is applied to the gate of the selection cell 11211, so that the selection cell 11211 is turned ON thus to form a path for reading out therethrough the data from the memory cell 1111.
The selection cell 11221 is constituted of MOS transistors, the gates of which are mutually connected via the column line 1142, and are connected to an output terminal of the column selection circuit 1162 via the column line 1142. The column selection circuit 1162 decodes an address provided from outside at a second stage decoding and applies, when the column line 1142 is thereby selected, a H-level signal to the column line 1142. Accordingly, the H-level signal is applied to the gate of the selection cell 11221, so that the selection cell 11221 is turned ON thus to form a path for reading out therethrough the data from the memory cell 1111.
Once a signal instructing to read out the data is received from outside, a low level (hereinafter, L-level) signal indicating start of the data read-out is applied to a sense amp activating signal, which provides the L-level signal to the read-out driver 1191, the buffer 1201 and the reference unit 122.
The read-out driver 1191 includes a drive transistor 1311, a path-forming transistor 1321, a path-blocking transistor 1331, and a NOR gate 1341.
The drive transistor 1311 is constituted of a MOS transistor, and applies a voltage according to the ON/OFF status of the memory cell 1111 to an input terminal of the buffer 1201. The path-forming transistor 1321 is constituted of a MOS transistor, and is turned ON by a H-level signal provided by the NOR gate 1341, so as to form a path for reading out the data therethrough from the memory cell 1111. The path-blocking transistor 1331 is constituted of a MOS transistor, and is turned ON by a H-signal provided by the sense amp activating signal, so as to block the path for reading out the data therethrough from the memory cell 1111. The NOR gate 1341 receives the sense amp activating signal at a first input terminal thereof. The NOR gate 1341 has a second input terminal connected to the source of the path-forming transistor 1321, so as to output a H-level signal to turn ON the path-forming transistor 1321, when the signal provided by the sense amp activating signal and the voltage of the source of the path-forming transistor 1321 are both at the L-level.
The buffer 1201 includes power MOS transistors 1351, 1361, and a MOS transistor 1371 that constitutes a constant current source. The buffer 1201 serves to buffer and amplify an input voltage, and to apply an output voltage VD1 thereof to a first input terminal of the sense amp 1231.
The reference unit 122 includes reference cells 1411, 1412, selection cells 14211, 14212, 14221, 14222, a word line drive circuit 143, column selection circuits 1441, 1442, drive transistors 1451, 1452, path-forming transistors 1461, 1462, path-blocking transistors 1471, 1472, NOR gates 1481, 1482, power MOS transistors 1491, 1492, 1501, 1502, and MOS transistors 1511, 1512 that constitute a constant current source.
The reference cells 1411, 1412 are MOS transistors which have the same structure and characteristic with the memory cell 1111. The reference cell 1411 is set in advance as a depression transistor, namely in an ON state, by phosphor ion implantation. The other reference cell 1412 is set in advance as an enhance transistor, namely in an OFF state, without undergoing the phosphor ion implantation.
The selection cells 14211, 14212 have the same structure and characteristic with the selection cell 11211; the selection cells 14221, 14222 with the selection cell 11221; the word line drive circuit 143 with the word line drive circuit 115; the column selection circuit 1441 with the column selection circuit 1161; the column selection circuit 1442 with the column selection circuit 1162; the drive transistors 1451, 1452 with the drive transistor 1311; and the path-forming transistors 1461, 1462 with the path-forming transistors 1321, respectively.
Likewise, path-blocking transistor 1471, 1472 have the same structure and characteristic with the path-blocking transistor 1331; the NOR gates 1481, 1482 with the NOR gate 1341; the power MOS transistors 1491, 1492, 1501, 1502 with the power MOS transistors 1351, 1361; and the MOS transistors 1511, 1512 with the MOS transistor 1371, respectively.
A purpose of such configuration is, because the sense amp 1231 is constituted of a differential amplifier, to equilibrate as much as possible a load connected to the first input terminal thereof with a load connected to the second input terminal thereof.
The drive transistor 1451 applies a voltage VRON according to an ON state of the reference cell 1411 to the gate of the power MOS transistor 1501. Likewise, the drive transistor 1452 applies a voltage VROFF according to an OFF state of the reference cell 1412 to the gate of the power MOS transistor 1502.
The power MOS transistors 1491, 1501, and the MOS transistor 1511 constituting the constant current source buffer and amplify the output voltage VRON of the drive transistor 1451. On the other hand, the power MOS transistors 1492, 1502, and the MOS transistor 1512 constituting the constant current source buffer and amplify the output voltage VROFF of the drive transistor 1452. That is, the power MOS transistors 1491, 1492, 1501, 1502 and the MOS transistors 1511, 1512 constitute a buffer 152.
Accordingly, when an output current of the buffer of the power MOS transistor 1501 is denoted by I1, and an output current of the power MOS transistor 1502 by I2, a current IR, which is the average of the current I1 and the current I2 as indicated by the equation (1), runs through the constant current sources, respectively constituted of the MOS transistor 1511 and 1512.IR=(I1+I2)/2  (1)
To the second input terminal of the sense amp 1231, therefore, a voltage VR, which is the average of the voltage VRON according to the ON state of the reference cell 1411 and the voltage VROFF according to the OFF state of the reference cell 1412 as indicated by the equation (2), is applied.VR=(VRON+VROFF)/2  (2)
As already stated the sense amp 1231 is constituted of a differential amplifier, so as to detect and amplify a difference between the voltage supplied by the buffer 1201 and the voltage supplied by the reference unit 122, and outputs the data to outside.